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  • RISC-V System-on-Chip Design

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RISC-V Microprocessor System-On-Chip Design is written to be accessible to an advanced undergraduate audience with limited background. It explains concepts from operating systems, VLSI, and memory systems as necessary, and High school mathematics is sufficient preparation for most of the book, although the floating point and division chapters will be primarily of interest to those with a curiosity about computer arithmetic. Like Harris and Harris’s Digital Design and Computer Architecture textbooks, this book will appeal to students with easy-to-read and complete explanations, sidebars, and occasional humor and cartoons.

  • Covers detailed design for all components of a nontrivial microprocessor
  • Provides detailed explanations on the implementation of RISC-V microprocessors
  • Uses open-source SystemVerilog code and test cases for the entire processor, including single-issue and superscalar cores, multicore, all extensions (including multiplication/division, floating point, and atomic memory operations), and common peripherals
  • Enables users to build scripts to implement the processor on the open-source Skywater process
  1. Publisher

    Morgan Kaufmann

  2. Publication date

    July 15, 2026

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Editorial Reviews

Review

Helps readers learn how to design microprocessors and systems-on-chip using the open source RISC-V instruction set architecture

From the Back Cover

RISC-V Microprocessor System-On-Chip Design is intended for a graduate or undergraduate course in microprocessor design. The reader will learn to design and optimize microprocessors and use them in a system-on-chip, applying contemporary design and verification tools. Much of the book describes detailed designs and tradeoffs for the functional blocks in and around a processor. RISC-V Microprocessor System-On-Chip Design is written to be accessible to an advanced undergraduate audience with limited background and will explain concepts from operating systems, VLSI, and memory systems as necessary. High school mathematics is sufficient preparation for most of the book, although the floating point and division chapters will be primarily of interest to those with a curiosity about computer arithmetic. Like Harris and Harris’s Digital Design and Computer Architecture textbooks, this book will appeal to students with easy-to-read and complete explanations, sidebars, and occasional humor and cartoons. The book comes with an open-source implementation and will include end-of-chapter problems to extend the RISC-V processor in various ways. Ancilliary materials include a GitHub repository with complete open-source SystemVerilog code, validation code in C and assembly language, and code for benchmarking and booting Linux.

About the authors

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  1. Sarah Harris

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  2. David Harris

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  3. James Stine

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    James Stine is the Edward Joullian Professor in Engineering in the School of Electrical and Computer Engineering at Oklahoma State University. He received his Ph.D. in electrical engineering from Lehigh University. He was previously with the Illinois Institute of Technology in Chicago, IL. He specializes in research and teaching in VLSI, digital arithmetic, computer system architecture, and digital design. He is also a leading developer of commercial and academic system on chip design flows for Google, Cadence Design Systems, Synopsys, Mentor Graphics and several public-domain tools. James’s interests including spending time with his family.